195 search results - page 2 / 39 » Design of clocked circuits using UML |
DAC
2009
ACM
13 years 10 months ago
2009
ACM
We present an unconventional clock distribution that emphasizes flexibility and layout independence. It suits a variety of applications, clock domain shapes and sizes using a modu...
ICCD
1992
IEEE
13 years 9 months ago
1992
IEEE
Asynchronous or self-timed systems that do not rely on a global clock to keep system components synchronized can offer significant advantages over traditional clocked circuits in ...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
ISLPED
1995
ACM
13 years 8 months ago
1995
ACM
This paper presents an e ective multiple clocking scheme for lower power RTL circuit design. The basis is to partition a behavioral description of the circuit into m modules fed b...
ISLPED
1995
ACM
13 years 8 months ago
1995
ACM
We argue that the clocked-CMOS (C2MOS) circuit family provides a very high throughput and low power alternative to other existing circuit techniques for the fast developing market...