Sciweavers

27 search results - page 5 / 6
» Design verification via simulation and automatic test patter...
Sort
View
DAC
2010
ACM
13 years 8 months ago
Scalable specification mining for verification and diagnosis
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
Wenchao Li, Alessandro Forin, Sanjit A. Seshia
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 2 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
ASPDAC
2001
ACM
112views Hardware» more  ASPDAC 2001»
13 years 9 months ago
Parameterized MAC unit implementation
Ethernet communication devices, such as adapter, hub, bridge and switch, all follow IEEE 802.3 standard protocol. We have designed and implemented an integrated 10/100 Mbps Etherne...
Ming-Chih Chen, Ing-Jer Huang, Chung-Ho Chen
DAC
2001
ACM
14 years 6 months ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
CLUSTER
2002
IEEE
13 years 5 months ago
ZENTURIO: An Experiment Management System for Cluster and Grid Computing
The need to conduct and manage large sets of experiments for scientific applications dramatically increased over the last decade. However, there is still very little tool support ...
Radu Prodan, Thomas Fahringer