This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
This paper introduces reFLect, a functional programming language with reflection features intended for applications in hardware design and verification. The reFLect language is st...
BLIF is a hardware description language designed for the hierarchical description of sequential circuits. We give a denotational semantics for BLIF-MV, a popular dialect of BLIF, t...
David A. Basin, Stefan Friedrich, Sebastian Mö...
It is common wisdom that synthesizing hardware from higher-level descriptions than Verilog will incur a performance penalty. The case study here shows that this need not be the ca...
Arvind, Rishiyur S. Nikhil, Daniel L. Rosenband, N...
Virtually every system designed today is an amalgam of hardware and software. Unfortunately, software and circuits that communicate across the hardware/software boundary are tedio...