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IOLTS
2006
IEEE
103views Hardware» more  IOLTS 2006»
13 years 11 months ago
Designing Robust Checkers in the Presence of Massive Timing Errors
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
Frederic Worm, Patrick Thiran, Paolo Ienne
BCS
2008
13 years 6 months ago
Hardware Dependability in the Presence of Soft Errors
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
Ashish Darbari, Bashir M. Al-Hashimi
ISQED
2009
IEEE
126views Hardware» more  ISQED 2009»
14 years 5 days ago
Robust differential asynchronous nanoelectronic circuits
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
Bao Liu
FMICS
2010
Springer
13 years 6 months ago
Model Checking the FlexRay Physical Layer Protocol
Abstract. The FlexRay standard, developed by a cooperation of leading companies in the automotive industry, is a robust communication protocol for distributed components in modern ...
Michael Gerke 0002, Rüdiger Ehlers, Bernd Fin...
ATVA
2005
Springer
202views Hardware» more  ATVA 2005»
13 years 11 months ago
Model Checking Real Time Java Using Java PathFinder
Abstract. The Real Time Specification for Java (RTSJ) is an augmentation of Java for real time applications of various degrees of hardness. The central features of RTSJ are real t...
Gary Lindstrom, Peter C. Mehlitz, Willem Visser