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LCTRTS
2000
Springer
13 years 8 months ago
Reordering Memory Bus Transactions for Reduced Power Consumption
Low energy consumption is becoming the primary design consideration for battery-operated and portable embedded systems, such as personal digital assistants, digital still and movi...
Bruce R. Childers, Tarun Nakra
DATE
2003
IEEE
94views Hardware» more  DATE 2003»
13 years 10 months ago
Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors
Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set–associative data cache consumes a significant...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
JEC
2006
88views more  JEC 2006»
13 years 4 months ago
Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
John Oliver, Ravishankar Rao, Diana Franklin, Fred...
JEC
2006
77views more  JEC 2006»
13 years 4 months ago
Tiny split data-caches make big performance impact for embedded applications
This paper shows that even very small data caches, when split to serve data streams exhibiting temporal and spatial localities, can improve performance of embedded applications wit...
Afrin Naz, Krishna M. Kavi, Wentong Li, Philip H. ...
MICRO
2006
IEEE
111views Hardware» more  MICRO 2006»
13 years 10 months ago
Memory Prefetching Using Adaptive Stream Detection
We present Adaptive Stream Detection, a simple technique for modulating the aggressiveness of a stream prefetcher to match a workload’s observed spatial locality. We use this co...
Ibrahim Hur, Calvin Lin