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DATE
2007
IEEE
92views Hardware» more  DATE 2007»
13 years 11 months ago
Test quality analysis and improvement for an embedded asynchronous FIFO
Embedded First-In First-Out (FIFO) memories are increasingly used in many IC designs. We have created a new full-custom embedded FIFO module with asynchronous read and write clock...
Tobias Dubois, Erik Jan Marinissen, Mohamed Aziman...
SEKE
2001
Springer
13 years 9 months ago
Temporal Logic Properties of Java Objects
ct 7 Applying finite-state verification techniques to software systems looks attractive because they are capable of detecting very subtle 8 defects in the logic design of these s...
Radu Iosif, Riccardo Sisto
ISSRE
2003
IEEE
13 years 10 months ago
Optimal Resource Allocation for the Quality Control Process
Software development project employs some Quality Control (QC) process to detect and remove defects. The final quality of the delivered software depends on the effort spent on al...
Pankaj Jalote, Bijendra Vishal
ISESE
2006
IEEE
13 years 11 months ago
PBR vs. checklist: a replication in the n-fold inspection context
Inspection is considered a powerful method to check software documents for defects. Many published work shows that inspections in requirements specification phase are particularly...
Lulu He, Jeffrey C. Carver
VTS
2008
IEEE
136views Hardware» more  VTS 2008»
13 years 11 months ago
Test-Pattern Grading and Pattern Selection for Small-Delay Defects
Timing-related defects are becoming increasingly important in nanometer technology designs. Small delay variations induced by crosstalk, process variations, powersupply noise, as ...
Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Te...