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» Deterministic Logic BIST for Transition Fault Testing
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IFIP
2001
Springer
13 years 9 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre
ASPDAC
2006
ACM
155views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Delay defect screening for a 2.16GHz SPARC64 microprocessor
This paper presents a case-study of delay defect screening applied to Fujitsu 2.16GHz SPARC64 microprocessor. A nonrobust delay test is used while each test vector is compacted to...
Noriyuki Ito, Akira Kanuma, Daisuke Maruyama, Hito...
DAC
2008
ACM
14 years 6 months ago
The synthesis of robust polynomial arithmetic with stochastic logic
As integrated circuit technology plumbs ever greater depths in the scaling of feature sizes, maintaining the paradigm of deterministic Boolean computation is increasingly challeng...
Weikang Qian, Marc D. Riedel