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GCB
2009
Springer
481views Biometrics» more  GCB 2009»
14 years 17 days ago
CUDA-based Multi-core Implementation of MDS-based Bioinformatics Algorithms
: Solving problems in bioinformatics often needs extensive computational power. Current trends in processor architecture, especially massive multi-core processors for graphic cards...
Thilo Fester, Falk Schreiber, Marc Strickert
GLVLSI
2009
IEEE
158views VLSI» more  GLVLSI 2009»
13 years 10 months ago
Exploration of memory hierarchy configurations for efficient garbage collection on high-performance embedded systems
Modern embedded devices (e.g., PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems include multi...
José Manuel Velasco, David Atienza, Katzali...
HPCA
2007
IEEE
14 years 6 months ago
Thermal Herding: Microarchitecture Techniques for Controlling Hotspots in High-Performance 3D-Integrated Processors
3D integration technology greatly increases transistor density while providing faster on-chip communication. 3D implementations of processors can simultaneously provide both laten...
Kiran Puttaswamy, Gabriel H. Loh
SIGGRAPH
1994
ACM
13 years 10 months ago
Priority rendering with a virtual reality address recalculation pipeline
Virtual reality systems are placing never before seen demands on computer graphics hardware, yet few graphics systems are designed specifically for virtual reality. An address rec...
Matthew Regan, Ronald Pose
3DIC
2009
IEEE
263views Hardware» more  3DIC 2009»
13 years 9 months ago
3D optical networks-on-chip (NoC) for multiprocessor systems-on-chip (MPSoC)
Abstract— Networks-on-chip (NoC) is emerging as a key onchip communication architecture for multiprocessor systemson-chip (MPSoC). In traditional electronic NoCs, high bandwidth ...
Yaoyao Ye, Lian Duan, Jiang Xu, Jin Ouyang, Mo Kwa...