315 search results - page 61 / 63 » Disk layout optimization for reducing energy consumption |
ICCAD
2007
IEEE
14 years 2 months ago
2007
IEEE
— Energy efficiency has become one of the most important issues to be addressed in today’s System-on-a-Chip (SoC) designs. One way to lower the power consumption is to reduce ...
ICALP
2009
Springer
14 years 16 days ago
2009
Springer
Speed scaling is a power management technique that involves dynamically changing the speed of a processor. This gives rise to dualobjective scheduling problems, where the operating...
LCTRTS
2010
Springer
13 years 7 months ago
2010
Springer
DSP processors usually provide dedicated address generation units (AGUs) to assist address computation. By carefully allocating variables in the memory, DSP compilers take advanta...
ICPPW
2007
IEEE
14 years 2 days ago
2007
IEEE
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
INFOCOM
2011
IEEE
12 years 9 months ago
2011
IEEE
—Cognitive radios (CRs) can mitigate the impending spectrum scarcity problem by utilizing their capability of accessing licensed spectrum bands opportunistically. While most exis...