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TVLSI
2008
157views more  TVLSI 2008»
13 years 4 months ago
Scalable QoS-Aware Memory Controller for High-Bandwidth Packet Memory
This paper proposes a high-performance scalable quality-of-service (QoS)-aware memory controller for the packet memory where packet data are stored in network routers. A major chal...
Hyuk-Jun Lee, Eui-Young Chung
INFOCOM
2005
IEEE
13 years 10 months ago
Practical algorithms for performance guarantees in buffered crossbars
— This paper is about high capacity switches and routers that give guaranteed throughput, rate and delay guarantees. Many routers are built using input queueing or combined input...
Shang-Tse Chuang, Sundar Iyer, Nick McKeown
ATAL
2005
Springer
13 years 10 months ago
An autonomous performance control framework for Distributed Multi-Agent Systems: a queueing theory based approach
Distributed Multi-Agent Systems (DMAS) such as supply chains functioning in highly dynamic environments need to achieve maximum overall utility during operation. The utility from ...
Nathan Gnanasambandam, Seokcheon Lee, Soundar R. T...
INFOCOM
1998
IEEE
13 years 9 months ago
Implementing Distributed Packet Fair Queueing in a Scalable Switch Architecture
To support the Internet's explosive growth and expansion into a true integrated services network, there is a need for cost-effective switching technologies that can simultaneo...
Donpaul C. Stephens, Hui Zhang
GLOBECOM
2006
IEEE
13 years 10 months ago
Interleaved Multistage Switching Fabrics for Scalable High Performance Routers
As the Internet grows exponentially, scalable high performance routers and switches on backbone are required to provide a large number of ports, higher throughput, lower delay late...
Rongsen He, José G. Delgado-Frias