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ICCD
2004
IEEE
96views Hardware» more  ICCD 2004»
14 years 1 months ago
Dynamic Address Compression Schemes: A Performance, Energy, and Cost Study
Dynamic address compression schemes that exploit address locality can help reduce both address bus energy and cost simultaneously with only a small performance penalty. In this wo...
Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Maha...
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
14 years 1 months ago
Fast, Performance-Optimized Partial Match Address Compression for Low-Latency On-Chip Address Buses
— The influence of interconnects on processor performance and cost is becoming increasingly pronounced with technology scaling. In this paper, we present a fast compression sche...
Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Maha...
ADHOCNOW
2008
Springer
13 years 5 months ago
An Energy-Efficient Query Aggregation Scheme for Wireless Sensor Networks
This paper presents a novel method for optimizing sliding window based continuous queries. We deal with two categories of aggregation operations: stepwise aggregation (e.g. COUNT) ...
Jun-Zhao Sun
ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
14 years 1 months ago
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
14 years 5 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey