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» Dynamic Partial Reconfigurable FIR Filter Design
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ARC
2006
Springer
201views Hardware» more  ARC 2006»
13 years 9 months ago
Dynamic Partial Reconfigurable FIR Filter Design
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
Yeong-Jae Oh, Hanho Lee, Chong Ho Lee
KES
2006
Springer
13 years 5 months ago
Implementation of a FIR Filter on a Partial Reconfigurable Platform
This paper presents our implemented, synthesized and tested on demand and partial reconfiguration approaches for FIR filters using Xilinx Virtex FPGAs. Our scope is to implement a ...
Hanho Lee, Chang-Seok Choi
EVOW
2006
Springer
13 years 9 months ago
On the Practical Limits of the Evolutionary Digital Filter Design at the Gate Level
Simple digital FIR filters have recently been evolved directly in the reconfigurable gate array, ignoring thus a classical method based on multiply
Lukás Sekanina, Zdenek Vasícek
ARC
2009
Springer
127views Hardware» more  ARC 2009»
13 years 9 months ago
Parametric Design for Reconfigurable Software-Defined Radio
Run-time reconfigurable FPGAs are powerful platforms for realising software-defined radio systems. This paper introduces a parametric approach to designing such systems based on ap...
Tobias Becker, Wayne Luk, Peter Y. K. Cheung
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
13 years 11 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker