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FCCM
2004
IEEE
144views VLSI» more  FCCM 2004»
13 years 8 months ago
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
In this paper we present a novel use of an FPGA as a computing element for streaming based application. We investigate the virtualized execution of dynamic reconfigurable tasks. We...
Matthias Dyer, Marco Platzner, Lothar Thiele
CC
2008
Springer
240views System Software» more  CC 2008»
13 years 6 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
JSSPP
2004
Springer
13 years 10 months ago
Reconfigurable Gang Scheduling Algorithm
 Using a single traditional gang scheduling algorithm cannot provide the best performance for all workloads and parallel architectures. A solution for this problem is the use of...
Luís Fabrício Wanderley Góes,...
LCTRTS
2004
Springer
13 years 10 months ago
Dynamic voltage scaling for real-time multi-task scheduling using buffers
This paper proposes energy efficient real-time multi-task scheduling (EDF and RM) algorithms by using buffers. The buffering technique overcomes a drawback of previous approaches ...
Chaeseok Im, Soonhoi Ha
SIGPRO
2008
136views more  SIGPRO 2008»
13 years 4 months ago
Estimation of slowly varying parameters in nonlinear systems via symbolic dynamic filtering
This paper introduces a novel method for real-time estimation of slowly varying parameters in nonlinear dynamical systems. The core concept is built upon the principles of symboli...
Venkatesh Rajagopalan, Subhadeep Chakraborty, Asok...