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GECCO
2009
Springer
192views Optimization» more  GECCO 2009»
13 years 3 months ago
Improving SMT performance: an application of genetic algorithms to configure resizable caches
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
Josefa Díaz, José Ignacio Hidalgo, F...
TPDS
2010
144views more  TPDS 2010»
13 years 3 months ago
Performance Evaluation of Dynamic Speculative Multithreading with the Cascadia Architecture
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
David A. Zier, Ben Lee
ICS
1999
Tsinghua U.
13 years 9 months ago
Clustered speculative multithreaded processors
In this paper we present a processor microarchitecture that can simultaneously execute multiple threads and has a clustered design for scalability purposes. A main feature of the ...
Pedro Marcuello, Antonio González
MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
13 years 9 months ago
A Dynamic Multithreading Processor
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
Haitham Akkary, Michael A. Driscoll
IPPS
2010
IEEE
13 years 3 months ago
Profitability-based power allocation for speculative multithreaded systems
With the shrinking of transistors continuing to follow Moore's Law and the non-scalability of conventional outof-order processors, multi-core systems are becoming the design ...
Polychronis Xekalakis, Nikolas Ioannou, Salman Kha...