39 search results - page 4 / 8 » Dynamic cache clustering for chip multiprocessors |
CF
2009
ACM
14 years 8 days ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
HPCA
2011
IEEE
12 years 9 months ago
2011
IEEE
The number of cores in a single chip multiprocessor is expected to grow in coming years. Likewise, aggregate on-chip cache capacity is increasing fast and its effective utilizatio...
ICS
2005
Tsinghua U.
13 years 11 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
DATE
2009
IEEE
14 years 15 days ago
2009
IEEE
Abstract—With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiproce...
ICPP
2009
IEEE
14 years 12 days ago
2009
IEEE
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...