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» Dynamic clock calibration via temperature measurement
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FPL
2006
Springer
140views Hardware» more  FPL 2006»
13 years 9 months ago
A Thermal Management and Profiling Method for Reconfigurable Hardware Applications
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
Phillip H. Jones, John W. Lockwood, Young H. Cho
BMCBI
2011
13 years 24 days ago
The impact of quantitative optimization of hybridization conditions on gene expression analysis
Background: With the growing availability of entire genome sequences, an increasing number of scientists can exploit oligonucleotide microarrays for genome-scale expression studie...
Peter Sykacek, David P. Kreil, Lisa A. Meadows, Ri...
WINET
2010
178views more  WINET 2010»
13 years 14 days ago
Zero-configuration indoor localization over IEEE 802.11 wireless infrastructure
With the technical advances in ubiquitous computing and wireless networking, there has been an increasing need to capture the context information (such as the location) and to figu...
Hyuk Lim, Lu-Chuan Kung, Jennifer C. Hou, Haiyun L...
LFCS
2009
Springer
14 years 10 days ago
Completeness Results for Memory Logics
Memory logics are a family of modal logics in which standard relational structures are augmented with data structures and additional operations to modify and query these structure...
Carlos Areces, Santiago Figueira, Sergio Mera
DAC
2001
ACM
14 years 6 months ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...