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IPPS
2005
IEEE
13 years 10 months ago
Improvement of Power-Performance Efficiency for High-End Computing
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. R...
Rong Ge, Xizhou Feng, Kirk W. Cameron
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
13 years 6 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
13 years 10 months ago
Power-aware scheduling of conditional task graphs in real-time multiprocessor systems
We propose a novel power-aware task scheduling algorithm for DVS-enabled real-time multiprocessor systems. Unlike the existing algorithms, the proposed DVS algorithm can handle co...
Dongkun Shin, Jihong Kim
EMSOFT
2004
Springer
13 years 10 months ago
Using resource reservation techniques for power-aware scheduling
Minimizing energy consumption is an important issue in the design of real-time embedded systems. As many embedded systems are powered by rechargeable batteries, the goal is to ext...
Claudio Scordino, Giuseppe Lipari
RTSS
2007
IEEE
13 years 11 months ago
Integrating Adaptive Components: An Emerging Challenge in Performance-Adaptive Systems and a Server Farm Case-Study
The increased complexity of performance-sensitive software systems leads to increased use of automated adaptation policies in lieu of manual performance tuning. Composition of ada...
Jin Heo, Dan Henriksson, Xue Liu, Tarek F. Abdelza...