16 search results - page 2 / 4 » Dynamically Delayed Postdictive Completeness and Consistency... |
ESANN
2003
13 years 6 months ago
2003
In this paper fully connected RTRL neural networks are studied. In order to learn dynamical behaviours of linear-processes or to predict time series, an autonomous learning algori...
INFOCOM
2000
IEEE
13 years 9 months ago
2000
IEEE
—We propose a new design for the Domain Name System (DNS) that takes advantage of recent advances in disk storage and multicast distribution technology. In essence, our design co...
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
DAC
1994
ACM
13 years 9 months ago
1994
ACM
A powerful combinational path sensitization engine is required for the efficient implementation of tools for test pattern generation, timing analysis, and delay fault testing. Path...
ICRA
2009
IEEE
13 years 11 months ago
2009
IEEE
— Our goal in this work is to make high level decisions for mobile robots. In particular, given a queue of prioritized object delivery tasks, we wish to find a sequence of actio...