18 search results - page 4 / 4 » EVAL: Utilizing processors with variation-induced timing err... |
ICCAD
1994
IEEE
13 years 9 months ago
1994
IEEE
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
ERSA
2006
13 years 6 months ago
2006
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
VLDB
2004
ACM
13 years 10 months ago
2004
ACM
In data stream applications, data arrive continuously and can only be scanned once as the query processor has very limited memory (relative to the size of the stream) to work with...