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MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
13 years 3 months ago
Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
Michael Steffen, Joseph Zambreno
ISPAN
1997
IEEE
13 years 9 months ago
RMESH Algorithms for Parallel String Matching
Abstract- String matching problem received much attention over the years due to its importance in various applications such as text/file comparison, DNA sequencing, search engines,...
Hsi-Chieh Lee, Fikret Erçal
ANNS
2007
13 years 7 months ago
An improved architecture for cooperative and comparative neurons (CCNs) in neural network
The ability to store and retrieve information is critical in any type of neural network. In neural network, the memory particularly associative memory, can be defined as the one i...
Md. Kamrul Islam
SBACPAD
2007
IEEE
128views Hardware» more  SBACPAD 2007»
13 years 12 months ago
Node Level Primitives for Parallel Exact Inference
We present node level primitives for parallel exact inference on an arbitrary Bayesian network. We explore the probability representation on each node of Bayesian networks and eac...
Yinglong Xia, Viktor K. Prasanna
SBACPAD
2006
IEEE
148views Hardware» more  SBACPAD 2006»
13 years 11 months ago
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inferen...
Vasanth Krishna Namasivayam, Animesh Pathak, Vikto...