283 search results - page 2 / 57 » Effective Program Verification for Relaxed Memory Models |
MICRO
2008
IEEE
13 years 5 months ago
2008
IEEE
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
POPL
2009
ACM
14 years 6 months ago
2009
ACM
Memory models define an interface between programs written in some language and their implementation, determining which behaviour the memory (and thus a program) is allowed to hav...
SPIN
2010
Springer
13 years 3 months ago
2010
Springer
This paper addresses the problem of verifying programs for the relaxed memory models implemented in modern processors. Specifically, it considers the TSO (Total Store Order) relax...
CAV
2009
Springer
14 years 5 months ago
2009
Springer
Abstract. Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptio...
CC
2010
Springer
14 years 5 days ago
2010
Springer
The problem of locally transforming or translating programs without altering their semantics is central to the construction of correct compilers. For concurrent shared-memory progr...