56 search results - page 1 / 12 » Efficient Backtracking Instruction Schedulers |
IEEEPACT
2000
IEEE
13 years 9 months ago
2000
IEEE
CASES
2007
ACM
13 years 8 months ago
2007
ACM
Delayed branching is a technique to alleviate branch hazards without expensive hardware branch prediction mechanisms. For VLIW processors with deep pipelines and many issue slots,...
ICTAI
2007
IEEE
13 years 11 months ago
2007
IEEE
Constraint satisfaction and propositional satisfiability problems are often solved using backtracking search. Previous studies have shown that portfolios of backtracking algorith...
PLDI
1996
ACM
13 years 9 months ago
1996
ACM
High performance compilers increasingly rely on accurate modeling of the machine resources to efficiently exploit the instruction level parallelism of an application. In this pape...
ISCA
2002
IEEE
13 years 9 months ago
2002
IEEE
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...