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MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
13 years 4 months ago
ReMAP: A Reconfigurable Heterogeneous Multicore Architecture
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
Matthew A. Watkins, David H. Albonesi
ISPAN
2009
IEEE
14 years 28 days ago
Chaining Clock Synchronization: An Energy-Efficient Clock Synchronization Scheme for Wireless Sensor Networks
— Since WSNs have restricted energy sources, the energy efficiency of a synchronization scheme is as important as the accuracy of a clock. To accomplish both the energy efficienc...
Sang Hoon Lee, Lynn Choi
DAC
2006
ACM
14 years 7 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...
ICPP
1995
IEEE
13 years 9 months ago
Impact of Load Imbalance on the Design of Software Barriers
Software barriers have been designed and evaluated for barrier synchronization in large-scale shared-memory multiprocessors, under the assumption that all processorsreach the sync...
Alexandre E. Eichenberger, Santosh G. Abraham
ICPP
2002
IEEE
13 years 11 months ago
Region Synchronization in Message Passing Systems
The development of correct synchronization code for distributed programs is a challenging task. In this paper, we propose an aspect oriented technique for developing synchronizati...
Gurdip Singh, Ye Su