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CODES
2005
IEEE
13 years 10 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
ISLPED
2004
ACM
157views Hardware» more  ISLPED 2004»
13 years 10 months ago
4T-decay sensors: a new class of small, fast, robust, and low-power, temperature/leakage sensors
We present a novel temperature/leakage sensor, developed for high-speed, low-power, monitoring of processors and complex VLSI chips. The innovative idea is the use of 4T SRAM cell...
Stefanos Kaxiras, Polychronis Xekalakis
CODES
2006
IEEE
13 years 6 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...