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DSN
2007
IEEE
13 years 11 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
GLVLSI
2010
IEEE
141views VLSI» more  GLVLSI 2010»
13 years 5 months ago
Energy-efficient redundant execution for chip multiprocessors
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
Pramod Subramanyan, Virendra Singh, Kewal K. Saluj...
IPPS
2007
IEEE
13 years 11 months ago
Fault-Tolerant Earliest-Deadline-First Scheduling Algorithm
The general approach to fault tolerance in uniprocessor systems is to maintain enough time redundancy in the schedule so that any task instance can be re-executed in presence of f...
Hakem Beitollahi, Seyed Ghassem Miremadi, Geert De...
PDPTA
2000
13 years 6 months ago
Evaluation of Integrated Error Processing and Fault Diagnosis in Multiprocessor Systems
This paper deals with multiprocessor systems required to provide both high performance and good figures of dependability attributes. Fault tolerance is pursued through a proper co...
Felicita Di Giandomenico, Silvano Chiaradonna, And...
SBCCI
2006
ACM
124views VLSI» more  SBCCI 2006»
13 years 11 months ago
A cryptography core tolerant to DFA fault attacks
This work describes a hardware approach for the concurrent fault detection and error correction in a cryptographic core. It has been shown in the literature that transient faults ...
Carlos Roberto Moratelli, Érika F. Cota, Ma...