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» Efficient Online and Offline Testing of Embedded DRAMs
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TC
2002
13 years 4 months ago
Efficient Online and Offline Testing of Embedded DRAMs
Sybille Hellebrand, Hans-Joachim Wunderlich, Alexa...
VTS
1999
IEEE
125views Hardware» more  VTS 1999»
13 years 9 months ago
Error Detecting Refreshment for Embedded DRAMs
This paper presents a new technique for on-line consistency checking of embedded DRAMs. The basic idea is to use the periodic refresh operation for concurrently computing a test c...
Sybille Hellebrand, Hans-Joachim Wunderlich, Alexa...
ECRTS
1999
IEEE
13 years 9 months ago
Handling sporadic tasks in off-line scheduled distributed real-time systems
Many industrial applications mandate the use of a timetriggered paradigm and consequently the use of off-line scheduling for reasons such as predictability, certification, cost, o...
Damir Isovic, Gerhard Fohler
DSD
2006
IEEE
126views Hardware» more  DSD 2006»
13 years 11 months ago
Off-Line Testing of Delay Faults in NoC Interconnects
Testing of high density SoCs operating at high clock speeds is an important but difficult problem. Many faults, like delay faults, in such sub-micron chips may only appear when th...
Tomas Bengtsson, Artur Jutman, Shashi Kumar, Raimu...
ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
13 years 9 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...