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» Efficient Procedure Mapping Using Cache Line Coloring
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PLDI
1997
ACM
13 years 8 months ago
Efficient Procedure Mapping Using Cache Line Coloring
Amir H. Hashemi, David R. Kaeli, Brad Calder
CASES
2010
ACM
13 years 2 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
ISCAPDCS
2007
13 years 6 months ago
Evaluation of architectural support for speech codecs application in large-scale parallel machines
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
Naeem Zafar Azeemi
TC
2011
12 years 11 months ago
Maximizing Spare Utilization by Virtually Reorganizing Faulty Cache Lines
—Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Since a large fraction of chip area is devoted to on-...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
JIB
2007
75views more  JIB 2007»
13 years 4 months ago
Mapping protein information to disease terminologies
In order to improve the accessibility of genomic and proteomic information to medical researchers, we have developed a procedure to link biological information on proteins involve...
Anaïs Mottaz, Yum Lina Yip, Patrick Ruch, Ann...