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ICCAD
2005
IEEE
141views Hardware» more  ICCAD 2005»
14 years 2 months ago
Architecture and compilation for data bandwidth improvement in configurable embedded processors
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
Jason Cong, Guoling Han, Zhiru Zhang
IFIP
2003
Springer
13 years 11 months ago
A Novel Energy Efficient Communication Architecture for Bluetooth Ad Hoc Networks
Bluetooth is a promising wireless technology aiming at supporting electronic devices to be instantly interconnected into short-range ad hoc networks. The Bluetooth medium access co...
Carlos de M. Cordeiro, Sachin Abhyankar, Dharma P....
HPCA
2002
IEEE
14 years 6 months ago
The Minimax Cache: An Energy-Efficient Framework for Media Processors
This work is based on our philosophy of providing interlayer system-level power awareness in computing systems [26, 27]. Here, we couple this approach with our vision of multipart...
Osman S. Unsal, Israel Koren, C. Mani Krishna, Csa...
DATE
2000
IEEE
113views Hardware» more  DATE 2000»
13 years 10 months ago
MASCOT: A Specification and Cosimulation Method Integrating Data and Control Flow
We integrate data and control flow at the system specification level, using the two specialized and well established languages Matlab and SDL. For this we provide a modeling techn...
Per Bjuréus, Axel Jantsch
MICRO
2006
IEEE
191views Hardware» more  MICRO 2006»
13 years 5 months ago
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Pierre Palatin, Yves Lhuillier, Olivier Temam