16 search results - page 2 / 4 » Efficient Tree Layout in a Multilevel Memory Hierarchy |
IFL
2000
Springer
13 years 8 months ago
2000
Springer
Sac is a functional array processing language particularly designed with numerical applications in mind. In this field the runtime performance of programs critically depends on the...
DAC
2001
ACM
14 years 5 months ago
2001
ACM
In this paper, we study the problem of performance-driven multi-level circuit clustering with application to hierarchical FPGA designs. We first show that the performance-driven m...
PODS
2006
ACM
14 years 5 months ago
2006
ACM
B-trees are the data structure of choice for maintaining searchable data on disk. However, B-trees perform suboptimally ? when keys are long or of variable length, ? when keys are...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
EUROPAR
2006
Springer
13 years 8 months ago
2006
Springer
Abstract. This paper presents a study of performance optimization of dense matrix multiplication on IBM Cyclops-64(C64) chip architecture. Although much has been published on how t...