133 search results - page 2 / 27 » Efficient code caching to improve performance and energy con... |
IPCCC
2006
IEEE
13 years 11 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
CODES
2005
IEEE
13 years 7 months ago
2005
IEEE
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
HPCA
2006
IEEE
13 years 11 months ago
2006
IEEE
Caches are very inefficiently utilized because not all the excess data fetched into the cache, to exploit spatial locality, is utilized. We define cache utilization as the percent...
CODES
2004
IEEE
13 years 9 months ago
2004
IEEE
We present a CPU scheduling algorithm, called Energy-efficient Utility Accrual Algorithm (or EUA), for battery-powered, embedded real-time systems. We consider an embedded softwar...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...