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» Efficient implementation of 3X for radix-8 encoding
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MJ
2008
117views more  MJ 2008»
13 years 5 months ago
Efficient implementation of 3X for radix-8 encoding
Several commercial processors have selected the radix-8 multiplier architecture to increase their speed, thereby reducing the number of partial products. Radix-8 encoding reduces ...
Gustavo A. Ruiz, Mercedes Granda
ISCA
2010
IEEE
229views Hardware» more  ISCA 2010»
13 years 3 months ago
Understanding sources of inefficiency in general-purpose chips
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Az...