6 search results - page 1 / 2 » Efficient spill code for SDRAM |
CASES
2003
ACM
13 years 8 months ago
2003
ACM
Processors such as StrongARM and memory such as SDRAM enable efficient execution of multiple loads and stores in a single instruction. This is particularly useful in connection wi...
CODES
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper discusses the trade-off between calculations and memory accesses in a 3D graphics tile renderer for visualization of data from medical scanners. The performance require...
ISSS
1999
IEEE
13 years 9 months ago
1999
IEEE
Code generation methods for digital signal processors are increasingly hampered by the combination of tight timing constraints imposed by the algorithms and the limited capacity o...
IEEEPACT
1998
IEEE
13 years 9 months ago
1998
IEEE
Register coalescing is used, as part of register allocation, to reduce the number of register copies. Developing efficient register coalescing heuristics is particularly important ...
EMSOFT
2004
Springer
13 years 10 months ago
2004
Springer
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...