Sciweavers

20 search results - page 2 / 4
» Efficient use of communications between an FPGA's embedded p...
Sort
View
FPL
2006
Springer
127views Hardware» more  FPL 2006»
13 years 9 months ago
On-FPGA Communication Architectures and Design Factors
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
AHS
2006
IEEE
137views Hardware» more  AHS 2006»
13 years 11 months ago
Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
Wing On Fung, Tughrul Arslan, Sami Khawam
IPPS
2005
IEEE
13 years 10 months ago
Dynamic Reconfiguration of Mechatronic Real-Time Systems Based on Configuration State Machines
Data flow and FSMs are used intensively to specify real-time systems in the field of mechatronics. Their implementation in FPGAs is discussed against the background of dynamic rec...
Steffen Toscher, Roland Kasper, Thomas Reinemann
FPGA
1995
ACM
118views FPGA» more  FPGA 1995»
13 years 8 months ago
An SBus Monitor Board
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
H. A. Xie, Kevin E. Forward, K. M. Adams, D. Leask
FCCM
2003
IEEE
135views VLSI» more  FCCM 2003»
13 years 10 months ago
Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable
Hybrid architectures, which are composed of a conventional processor closely coupled with reconfigurable logic, seem to combine the advantages of both types of hardware. They pres...
Benjamin A. Levine, Herman Schmit