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ITC
1997
IEEE
123views Hardware» more  ITC 1997»
13 years 9 months ago
Modifying User-Defined Logic for Test Access to Embedded Cores
Testing embedded cores is a challenge because access to core I/Os is limited. The user-defined logic (ZJDL) surrounding the core may restrict the set of test vectors that can be a...
Bahram Pouya, Nur A. Touba
DATE
1999
IEEE
162views Hardware» more  DATE 1999»
13 years 10 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
LCTRTS
1999
Springer
13 years 9 months ago
Optimizing for Reduced Code Space using Genetic Algorithms
Code space is a critical issue facing designers of software for embedded systems. Many traditional compiler optimizations are designed to reduce the execution time of compiled cod...
Keith D. Cooper, Philip J. Schielke, Devika Subram...
ALIFE
1999
13 years 5 months ago
An Approach to Biological Computation: Unicellular Core-Memory Creatures Evolved Using Genetic Algorithms
A novel machine language genetic programming system that uses one-dimensional core memories is proposed and simulated. The core is compared to a biochemical reaction space, and in ...
Hikeaki Suzuki
SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
13 years 10 months ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar