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MTDT
2003
IEEE
100views Hardware» more  MTDT 2003»
13 years 10 months ago
Optimal Spare Utilization in Repairable and Reliable Memory Cores
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-...
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
13 years 10 months ago
Optimal Reconfiguration Functions for Column or Data-bit Built-In Self-Repair
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...
Michael Nicolaidis, Nadir Achouri, Slimane Boutobz...
DSN
2003
IEEE
13 years 10 months ago
On the Design of Robust Integrators for Fail-Bounded Control Systems
This paper describes the design and evaluation of a robust integrator for software-implemented control systems. The integrator is constructed as a generic component in the Simulin...
Jonny Vinter, Andréas Johansson, Peter Folk...
DATE
2007
IEEE
145views Hardware» more  DATE 2007»
13 years 11 months ago
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
Riccardo Mariani, Gabriele Boschi, Federico Colucc...
DFT
1999
IEEE
114views VLSI» more  DFT 1999»
13 years 9 months ago
Yield Enhancement Considerations for a Single-Chip Multiprocessor System with Embedded DRAM
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
Markus Rudack, Dirk Niggemeyer