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CODES
2005
IEEE
13 years 6 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
ICCAD
2002
IEEE
103views Hardware» more  ICCAD 2002»
14 years 1 months ago
Synthesis of customized loop caches for core-based embedded systems
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
Susan Cotterell, Frank Vahid
DELTA
2008
IEEE
13 years 11 months ago
Improved Policies for Drowsy Caches in Embedded Processors
In the design of embedded systems, especially batterypowered systems, it is important to reduce energy consumption. Cache are now used not only in general-purpose processors but a...
Junpei Zushi, Gang Zeng, Hiroyuki Tomiyama, Hiroak...
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
13 years 10 months ago
A first look at the interplay of code reordering and configurable caches
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
LCTRTS
2000
Springer
13 years 8 months ago
Reordering Memory Bus Transactions for Reduced Power Consumption
Low energy consumption is becoming the primary design consideration for battery-operated and portable embedded systems, such as personal digital assistants, digital still and movi...
Bruce R. Childers, Tarun Nakra