23 search results - page 1 / 5 » Energy and latency evaluation of NoC topologies |
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
Abstract — Mapping applications onto different networks-onchip (NoCs) topologies is done by mapping processing cores on local ports of routers considering requirements like laten...
SBCCI
2005
ACM
13 years 10 months ago
2005
ACM
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
NOCS
2009
IEEE
13 years 11 months ago
2009
IEEE
While NoCs are efficient in delivering high throughput point-to-point traffic, their multi-hop operation is too slow for latency sensitive signals. In addition, NoCS are inefficie...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper, we use the generalized binary de Bruijn (GBDB) graph as a scalable and efficient network topology for an on-chip communication network. Using just two-layer wiring,...
IEEEHPCS
2010
13 years 3 months ago
2010
Network-on-chip (NoC) architectures adopted for Systemon-Chip (SoC) are characterized by different trade-offs between latency, throughput, communication load, energy consumption, ...