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IPPS
2000
IEEE
13 years 10 months ago
Augmenting Modern Superscalar Architectures with Configurable Extended Instructions
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
Xianfeng Zhou, Margaret Martonosi
IEEEPACT
2003
IEEE
13 years 11 months ago
The Impact of Resource Partitioning on SMT Processors
Simultaneous multithreading (SMT) increases processor throughput by multiplexing resources among several threads. Despite the commercial availability of SMT processors, several as...
Steven E. Raasch, Steven K. Reinhardt
MICRO
2008
IEEE
113views Hardware» more  MICRO 2008»
14 years 4 days ago
From SODA to scotch: The evolution of a wireless baseband processor
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly chan...
Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, ...
ICPP
2005
IEEE
13 years 11 months ago
Exploring Processor Design Options for Java-Based Middleware
Java-based middleware is a rapidly growing workload for high-end server processors, particularly Chip Multiprocessors (CMP). To help architects design future microprocessors to ru...
Martin Karlsson, Erik Hagersten, Kevin E. Moore, D...
ISCA
1998
IEEE
139views Hardware» more  ISCA 1998»
13 years 10 months ago
Simultaneous Multithreading: Maximizing On-Chip Parallelism
This paper examines simultaneous multithreading, a technique permitting several independent threads to issue instructions to a superscalar's multiple functional units in a si...
Dean M. Tullsen, Susan J. Eggers, Henry M. Levy