9 search results - page 1 / 2 » Energy-Efficient NoC for Best-Effort Communication |
FPL
2005
Springer
13 years 10 months ago
2005
Springer
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for Multi-Processor System-onChip (MPSoC) architectures. In an earlier paper we proposed a energ...
MASCOTS
2007
2007
A Novel Flow Control Scheme for Best Effort Traffic in NoC Based on Source Rate Utility Maximization
13 years 6 months ago
—Advances in semiconductor technology, has enabled designers to put complex, massively parallel multiprocessor systems on a single chip. Network on Chip (NoC) that supports high ...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Managing the complexity of designing chips containing billions of transistors requires decoupling computation from communication. For the communication, scalable and compositional...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper, we use the generalized binary de Bruijn (GBDB) graph as a scalable and efficient network topology for an on-chip communication network. Using just two-layer wiring,...
ISCA
2006
IEEE
13 years 4 months ago
2006
IEEE
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...