24 search results - page 4 / 5 » Energy-efficient instruction cache using page-based placemen... |
SPAA
2006
ACM
13 years 11 months ago
2006
ACM
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
TVLSI
2010
13 years 13 days ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
ISCAPDCS
2007
13 years 7 months ago
2007
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
LCTRTS
2007
Springer
13 years 12 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
RTSS
2006
IEEE
13 years 11 months ago
2006
IEEE
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...