35 search results - page 2 / 7 » Enhancing Spatial Locality via Data Layout Optimizations |
POPL
2002
ACM
14 years 5 months ago
2002
ACM
Data-layout optimizations rearrange fields within objects, objects within objects, and objects within the heap, with the goal of increasing spatial locality. While the importance ...
IPPS
1999
IEEE
13 years 9 months ago
1999
IEEE
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
CDES
2006
13 years 7 months ago
2006
The ability to improve the yield of integrated circuits through layout modification has been recognized and several techniques for yield enhanced routing and compaction have been ...
IEEEPACT
2009
IEEE
13 years 3 months ago
2009
IEEE
As the gap between processor and memory continues to grow, memory performance becomes a key performance bottleneck for many applications. Compilers therefore increasingly seek to m...
IEEEPACT
1998
IEEE
13 years 9 months ago
1998
IEEE
Global locality analysis is a technique for improving the cache performance of a sequence of loop nests through a combination of loop and data layout optimizations. Pure loop tran...