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» Error Catch and Analysis for Semiconductor Memories Using Ma...
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ICCAD
2000
IEEE
97views Hardware» more  ICCAD 2000»
13 years 10 months ago
Error Catch and Analysis for Semiconductor Memories Using March Tests
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
Chi-Feng Wu, Chih-Tsun Huang, Chih-Wea Wang, Kuo-L...
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
14 years 5 days ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand