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ISLPED
1997
ACM
83views Hardware» more  ISLPED 1997»
13 years 9 months ago
A symbolic algorithm for low-power sequential synthesis
We present an algorithm that restructures the state transition graph STG of a sequential circuit so as to reduce power dissipation. The STG is modi ed without changing the behav...
Balakrishna Kumthekar, In-Ho Moon, Fabio Somenzi
DEBU
2008
141views more  DEBU 2008»
13 years 5 months ago
Oracle's SQL Performance Analyzer
We present the SQL Performance Analyzer, a novel approach in Oracle Database 11g to testing database changes, such as upgrades, parameter changes, schema changes, and gathering op...
Khaled Yagoub, Peter Belknap, Benoît Dagevil...
DATE
2009
IEEE
163views Hardware» more  DATE 2009»
14 years 1 days ago
Fixed points for multi-cycle path detection
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
Vijay D'Silva, Daniel Kroening
PROMISE
2010
13 years 1 days ago
Defect cost flow model: a Bayesian network for predicting defect correction effort
Background. Software defect prediction has been one of the central topics of software engineering. Predicted defect counts have been used mainly to assess software quality and est...
Thomas Schulz, Lukasz Radlinski, Thomas Gorges, Wo...
ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
14 years 2 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...