Sciweavers

201 search results - page 41 / 41
» Estimating the Parallel Start-Up Overhead for Parallelizing ...
Sort
View
TVLSI
2010
13 years 22 days ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...