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ISLPED
1997
ACM
130views Hardware» more  ISLPED 1997»
13 years 9 months ago
K2: an estimator for peak sustainable power of VLSI circuits
New measures of peak power in the context of sequential circuits are proposed. This paper presents an automatic procedure to obtain very good lower bounds on these measures as wel...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
14 years 5 months ago
Estimation of Maximum Power-Up Current
Power gating is emerging as a viable solution to reduction of leakage current. However, power gated circuits are different from the conventional designs in the sense that a power-...
Fei Li, Lei He, Kewal K. Saluja
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
13 years 9 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer
TCAD
1998
115views more  TCAD 1998»
13 years 5 months ago
Probabilistic modeling of dependencies during switching activity analysis
—This paper addresses, from a probabilistic point of view, the issue of switching activity estimation in combinational circuits under the zero-delay model. As the main theoretica...
Radu Marculescu, Diana Marculescu, Massoud Pedram
ICCAD
1994
IEEE
121views Hardware» more  ICCAD 1994»
13 years 9 months ago
A cell-based power estimation in CMOS combinational circuits
In this paper we present a power dissipation model considering the charging/discharging of capacitance at the gate output node as well as internal nodes, and capacitance feedthrou...
Jiing-Yuan Lin, Tai-Chien Liu, Wen-Zen Shen