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HPCA
2011
IEEE
12 years 9 months ago
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...
Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tu...
MICRO
2008
IEEE
148views Hardware» more  MICRO 2008»
13 years 11 months ago
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach
—Efficient sharing of system resources is critical to obtaining high utilization and enforcing system-level performance objectives on chip multiprocessors (CMPs). Although sever...
Ramazan Bitirgen, Engin Ipek, José F. Mart&...
ICPP
2008
IEEE
13 years 11 months ago
Machine Learning Models to Predict Performance of Computer System Design Alternatives
Computer manufacturers spend a huge amount of time, resources, and money in designing new systems and newer configurations, and their ability to reduce costs, charge competitive p...
Berkin Özisikyilmaz, Gokhan Memik, Alok N. Ch...
OOPSLA
2009
Springer
13 years 12 months ago
Scalable nonblocking concurrent objects for mission critical code
The high degree of complexity and autonomy of future robotic space missions, such as Mars Science Laboratory (MSL), poses serious challenges in assuring their reliability and ef...
Damian Dechev, Bjarne Stroustrup
APN
1999
Springer
13 years 9 months ago
Parallel Approaches to the Numerical Transient Analysis of Stochastic Reward Nets
Abstract. This paper presents parallel approaches to the complete transient numerical analysis of stochastic reward nets (SRNs) for both shared and distributed-memory machines. Par...
Susann C. Allmaier, David Kreische