21 search results - page 4 / 5 » Evaluating memory architectures for media applications on Co... |
ERSA
2006
13 years 7 months ago
2006
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
In this paper we present a methodology that is based on SystemC [1] for rapid prototyping to greatly enhance and accelerate the exploration of complex systems to optimize the syst...
FPGA
2010
ACM
13 years 6 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
DATE
1998
IEEE
13 years 10 months ago
1998
IEEE
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
IEEEPACT
2007
IEEE
14 years 1 days ago
2007
IEEE
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...