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ISPASS
2009
IEEE
14 years 17 hour ago
Accurately approximating superscalar processor performance from traces
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
Kiyeon Lee, Shayne Evans, Sangyeun Cho
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
13 years 11 months ago
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmo...
TSE
1998
93views more  TSE 1998»
13 years 4 months ago
Xception: A Technique for the Experimental Evaluation of Dependability in Modern Computers
An important step in the development of dependable systems is the validation of their fault tolerance properties. Fault injection has been widely used for this purpose, however wi...
Joao Carreira, Henrique Madeira, João Gabri...
ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
13 years 9 months ago
Performance Characterization of a Quad Pentium Pro SMP using OLTP Workloads
Commercial applications are an important, yet often overlooked, workload with significantly different characteristics from technical workloads. The potential impact of these diffe...
Kimberly Keeton, David A. Patterson, Yong Qiang He...