663 search results - page 3 / 133 » Evaluating the effectiveness of a new instructional approach |
CGO
2010
IEEE
14 years 28 days ago
2010
IEEE
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
IEEEPACT
2002
IEEE
13 years 11 months ago
2002
IEEE
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruction level parallelism by issuing load instructions at the earliest time withou...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
Modeling and simulating pipelined processors in procedural languages such as C/C++ requires lots of cost in handling concurrent events, which hinders fast simulation. A number of ...
LCTRTS
2007
Springer
14 years 5 days ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
CSSE
2008
IEEE
14 years 15 days ago
2008
IEEE
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...