17 search results - page 3 / 4 » Evaluation of Algorithms for Low Energy Mapping onto NoCs |
ICCD
2007
IEEE
13 years 9 months ago
2007
IEEE
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
DAC
2008
ACM
13 years 7 months ago
2008
ACM
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
CASES
2003
ACM
2003
ACM
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
13 years 9 months ago
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
ISSS
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper addresses the problem of mapping an application, which is highly dynamic in the future, onto a heterogeneous multiprocessor platform in an energy efficient way. A two-p...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...